Final Program

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Saturday – Sunday, March 31 – April 01, 2012

Workshops and Tutorials

Room	3/31 8:30 – 12:00	3/31 1:30 – 5:00	4/1 8:30 – 12:00	4/1 1:30 – 5:00
Plaza	PIN	DynRio	OPENCL	WISH
SanCarlos2	WCET	<open>	ILDJIT	ILDJIT
SanCarlos1	HYACC	HYACC	DELITE	DELITE
University	n/a	n/a	<open>	MP+GPU

Monday April 02, 2012

9:00 AM – 9:15 AM Opening
9:15 AM – 10:15 AM Invited Speaker

Chris Lattner

“Increasing Industry Impact of Compiler Research”

Chris is lead and architect of the open source LLVM Project  (http://llvm.org) a widely used set of compiler infrastructure, as well as Director of Low Level Tools at a prominent technology company.

10:15 AM – 10:30 AM Break
10:30 AM – 12:00 PM Session 1

Compilation

Session Chair: Hugh Leather

Compiling For Niceness: Mitigating Contention for QoS in Warehouse Scale Computers
Lingjia Tang, Jason Mars and Mary Lou Soffa.

Compiling for Automatically Generated Instruction Set Extensions
Alastair Murray and Björn Franke.

Dynamic Compilation of Data-Parallel Kernels for Vector Processors
Andrew Kerr, Gregory Diamos and Sudhakar Yalamanchili.

12:00 PM – 1:00 PM Lunch
1:00 PM – 3:00 PM Session 2

Optimization

Session Chair: Naveen Neelakantam

Panacea: Towards Holistic Optimization of MapReduce Applications
Jun Liu, Nishkam Ravi, Srimat Chakradhar and Mahmut Kandemir.

WCET-aware Static Locking of Instruction Caches
Sascha Plazar, Heiko Falk, Jan Kleinsorge and Peter Marwedel.

Reconciling Transactional Conflicts with Compiler’s Help
Sandya Mannarswamy and Ramaswamy Govindarajan.

Micro-Specialization: Dynamic Code Specialization of Database Management Systems
Rui Zhang, Saumya Debray and Richard Snodgrass.

3:00 PM – 3:30 PM Break
3:30 PM – 5:30 PM Session 3

Parallelization

Session Chair: John Cavazos

Scan Detection and Parallelization in “Inherently Sequential” Nested Loop Programs
Yun Zou and Sanjay Rajopadhye.

HELIX: Automatic Parallelization of Irregular Programs for Chip Multiprocessing
Simone Campanoni, Timothy M. Jones, Glenn Holloway, Vijay Janapa Reddi, Gu-Yeon Wei and David Brooks.

Automatic Speculative DOALL for Clusters
Hanjun Kim, Nick P. Johnson, Jae W. Lee, Scott A. Mahlke and David I. August.

HQEMU: A Multi-Threaded and Retargetable Dynamic Binary Translator on Multicores
Ding-Yong Hong, Chun-Chen Hsu, Pen-Chung Yew, Jan-Jan Wu, Wei-Chung Hsu, Yeh-Ching Chung, Pangfeng Liu and Chien-Min Wang.

Evening – Reception and SRC Poster Session
Business Meeting
Steering Committee Meeting

Tuesday, April 03, 2012

8:30 AM – 9:30 AM Keynote

David Blythe

“Hardware Software Co-design for Visual Computing”

David Blythe is the Chief Graphics Software Architect for the Visual  Computing Group and is responsible for defining graphics & media software  architecture across Intel products. David joined Intel in 2010.  Prior to  joining Intel, he was a software architect at Microsoft where he oversaw  the later evolution of the DirectX API and the display driver model.  Previous to that, David was heavily involved in the progression of the  OpenGL API and graphics hardware acceleration through 10 years of products  at Silicon Graphics. David holds a Master of Science and Bachelor of  Science degrees from the University of Toronto.

9:30 AM – 10:00 AM Break
10:00 AM – 12:00 PM Session 4

Dynamic Instrumentation, Error Detection

Session Chair: Angela Brown

PinADX: An Interface for Customizable Debugging with Dynamic Instrumentation
Gregory Lueck, Harish Patil and Cristiano Peeira.

DeadSpy: A Tool to Pinpoint Program Inefficiencies
Milind Chabbi and John Mellor-Crummey.

Light-weight Bounds Checking
Niranjan Hasabnis, Ashish Mishra and R Sekar.

Runtime Asynchronous Fault Tolerance via Speculation
Yun Zhang, Soumyadeep Ghosh, Jialu Huang, Jae W. Lee, Scott Mahlke and David I. August.

12:00 PM – 1:30 PM Lunch
1:30 PM – 2:30 PM SRC Finalists
2:30 PM – 3:30 PM Session 5

GPU Optimization

Session Chair: Dhruva Chakrabarti

Auto-Generation and Auto-Tuning of 3D Stencil Codes on heterogeneous GPU Clusters
Yongpeng Zhang and Frank Mueller.

Dynamically Managed Data for CPU-GPU Architectures
Thomas B. Jablin, James A. Jablin, Prakash Prabhu, Feng Liu and David I. August.

3:30 PM – 4:00 PM Break
4:00 PM – 5:30 PM Session 6

Profiling and Program Characterization

Session Chair: Maria Garzaran

Phase Guided Profiling for Fast Cache Modeling
Andreas Sembrant, David Black-Schaffer and Erik Hagersten.

Efficient Data Dependence Profiling using Software Signatures
Rajeshwar Vanka and James Tuck.

Using Graph-Based Program Characterization for Predictive Modeling
Eunjung Park, John Cavazos and Marco A. Alvarez.

Evening – Excursion to Tech Museum (more info)

Wednesday, April 04, 2012

8:30 AM – 10:00 AM Session 7

Memory Management

Session Chair: Edson Borin

Hierarchical Overlapped Tiling
Xing Zhou, Jean-Pierre Giacalone, Maria Garzaran, Bob Kuhn, Yang Ni and David Padua.

An Automatic Code Overlaying Technique for Multicores with Explicitly-Managed Memory Hierarchies
Choonki Jang, Jun Lee, Sangmin Seo and Jaejin Lee.

Matching Memory Access Patterns and Data Placement for NUMA Systems
Zoltan Majo and Thomas Gross.

10:00 AM – 10:30 AM Break
10:30 AM – 12:00 PM Session 8

Program Analysis

Session Chair: Kim Hazelwood

Accelerating Dynamic Program Analysis on Multicores
Danilo Ansaloni, Walter Binder, Abbas Heydarnoori and Lydia Y. Chen. Deferred Methods:

Efficient bottom-up heap analysis for symbolic path-based data access summaries
Ivan Matosevic and Tarek Abdelrahman.

On-demand Dynamic Summary-based Points-to Analysis
Lei Shang, Xinwei Xie and Jingling Xue.

12:00 PM – 12:30 PM Awards and Closing